The present invention relates to a method for forming a storage electrode on a semiconductor substrate, and in particular to a storage electrode formation method which can prevent formation of a sharp upper edged cylindrical storage electrode.
Typically, a capacitor having a high capacitance is required to produce a high integration memory device. Different approaches for producing a high capacitance capacitor have been developed. In one particular method, an effective area of a storage electrode is widened to provide a high capacitance capacitor. Widening the storage electrode area requires a relatively large surface area semiconductor; therefore, this method is generally not suitable for producing a high integration semiconductor substrate of limited surface area.
In another method, an increase in capacitor""s capacitance is achieved using a dielectric material having a high dielectric constant. In this method, a storage electrode is typically oxidized during the dielectric material crystallization process. This results in a formation of a diffusion barrier film on the dielectric material. The storage electrode is generally produced using a noble metal. Therefore, a leakage current is often generated at the interface between the diffusion barrier film and the dielectric film. Even when a high dielectric material, such as (Ba1-xSrx)TiO3 (BST) or SrTiO3 (STO), is used to increase the capacitor""s capacitance, the storage electrode is generally produced using a noble metal. Most often, noble metal platinum is used because it generally does not react significantly with a reaction gas during an etching process. Of the small amount of platinum that react with the reaction gas, most of the reacted platinum is often re-deposited at side walls in the etching process. Therefore, use of platinum in conventional storage electrode production has a technical limit in the patterning and etching processes. Moreover, the separation distance between storage electrodes of about 0.15 xcexcm or smaller is difficult to achieve. Furthermore, vertical storage electrode profiles are also difficult to achieve.
Such an etching property hardly satisfies the design specification when the effective area of storage electrode is increased by increasing its height. Formation of a geometric shape storage electrode by stacking layers of storage electrodes in a narrow area typically requires repeated depositing, masking and etching of the storage electrode material. The whole process is relatively complicated, and often there is a significant height difference between each semiconductor substrates after the capacitor formation. In addition, the height difference within each semiconductor substrate between the region where the capacitor has been formed and the region where the capacitor has not been formed is substantially identical to the height of the capacitor, which causes problems in a subsequent metal interconnection process.
A conventional method for forming a storage electrode of a semiconductor device will now be explained in detail with reference to the accompanying FIGS. 1A and 1B, which are cross-sectional diagrams illustrating sequential steps for forming a storage electrode on a semiconductor substrate. As illustrated in FIG. 1A, a substructure including a device isolation insulation film, a metal-oxide semiconductor field effect transistor (MOSFET), and a bit line are formed on a semiconductor substrate 11. An interlayer insulation film 13 is formed over the resultant structure. Thereafter, the interlayer insulation film 13 is etched using a storage electrode contact mask to expose a presumed storage electrode contact region on the semiconductor substrate 11, thereby forming a storage electrode contact hole (not shown). A storage electrode contact plug 15 contacting the semiconductor substrate 11 through the storage electrode contact hole is then produced.
A first conductive layer (not shown) and a core insulation film (not shown) are sequentially coated on to the resultant structure. The core insulation film and the first conductive layer are etched using a storage electrode mask to protect the presumed storage electrode region. This results in formation of a stacked structure of a core insulation film pattern 19 and a first conductive layer pattern 17. A second conductive layer 21 is formed over the resultant structure to contact the first conductive layer pattern 17. As shown in FIG. 1B, a second conductive layer spacer 23 is formed at the side walls of the stacked structure by etching the second conductive layer 21. Thereafter, a cylindrical storage electrode comprising the first conductive layer pattern 17 and the second conductive layer spacer 23 is produced by removing the core insulation film pattern 19.
One of the disadvantages in most conventional storage electrode formation methods is that the upper portion of the cylindrical second conductive layer spacer 23 has a sharp upper edge (i.e., pointed). See element (a) in FIG. 1B. This results in deterioration of the dielectric property of dielectric material. In addition, formation of the conductive layer spacer typically produces incomplete etching of the conductive layer which results in a short between the storage electrodes, thereby reducing the overall yield of the semiconductor substrate.
Therefore, it is an object of the present invention to provide a method for forming a storage electrode on a semiconductor substrate which can prevent the upper portion of the cylindrical storage electrode from being pointed and also prevent a short from being generated between the storage electrodes. Accordingly, one aspect of the present invention provides a method for forming a conductive layer as high as the storage electrode, and forming the storage electrode by a two-step etching process with a high etching selection ratio for the conductive layer using an insulation film pattern as a mask.
One particular embodiment of the present invention provides a method for forming a semiconductor device comprising a storage electrode, said method comprising the steps of:
producing a semiconductor substrate comprising a conductive layer, a pattern producing layer, and an etch barrier film disposed inbetween said conductive layer and said pattern producing layer;
producing a storage electrode region pattern on said pattern producing layer; and
producing a storage electrode region from said conductive layer using said storage electrode region pattern of said pattern producing layer.
The semiconductor substrate can further comprise an interlayer insulation film between the semiconductor substrate and the conductive layer. The interlayer insulation film can also include a storage electrode contact plug.
The method can further include the steps of removing the pattern producing layer after the step of producing storage electrode region from the conductive layer.
The step of producing the storage electrode region from the conductive layer can include the steps of producing a spacer type insulation film on the storage electrode region pattern. The spacer type insulation film producing step can further include the steps of: coating the storage electrode region pattern produced from the pattern producing layer with an insulation film; and removing the insulation film and the etch barrier film to produce the spacer type insulation film comprising the insulation film on side walls of the storage electrode region pattern of the pattern producing layer.
And the step of producing the storage electrode region from the conductive layer can further comprise the steps of: removing the pattern producing layer and a predetermined thickness of the conductive layer using the spacer type insulation film as a mask and the etch barrier film as an etch stop layer; and removing the etch barrier film and the conductive layer to form the storage electrode using the spacer type insulation film as a mask.
In one particular embodiment of the present invention, the pattern producing layer is a second conductive layer.
Another aspect of the present invention provides a method for producing a storage electrode on a semiconductor substrate comprising the steps of:
producing a semiconductor substrate comprising an interlayer insulation film, wherein said interlayer insulation film comprises a storage electrode contact plug;
forming a conductive layer on said interlayer insulation film;
forming an etch barrier film on said conductive layer;
forming a second conductive layer on said etch barrier film for protecting a presumed storage electrode region on said etch barrier film;
forming a storage electrode region pattern on said second conductive layer;
forming an insulation film on said storage electrode region pattern;
etching said insulation film and said etch barrier film to produce a spacer type insulation film pattern at the side walls of said second conductive layer storage electrode region pattern, and to produce a first etch barrier film pattern at the lower portions of said insulation film and said second conductive layer storage electrode region pattern;
removing said second conductive layer and a predetermined thickness of said conductive layer using said insulation film as an etching mask and using said first etch barrier film pattern as an etch stop layer;
forming a cylindrical storage electrode and a second etch barrier film pattern at the lower portion of said insulation film by etching the residual conductive layer and said first etch barrier film pattern using said insulation film as an etching mask; and
removing said insulation film and said second etch barrier film pattern to produce said storage electrode on said semiconductor substrate.